1. Field of the Invention
The inventive concept relates to a lead frame and a bonding method, and more particularly, to a prefabricated lead frame and a bonding method using the prefabricated lead frame.
2. Description of the Related Art
Wire bonding is a general interconnection method for semiconductor devices. Wire bonding includes connecting pads of a semiconductor chip to I/O (input/output) wires of an electronic package case or to wiring pads on a substrate using metal wires. In a semiconductor packaging process, a wire bonding process is generally used for bonding a first level package, that is, a chip pad and a substrate pad, using metal wires.
FIG. 1 is a schematic view illustrating a structure of a package after a conventional wire bonding process is performed.
In detail, in the package of FIG. 1, a semiconductor chip 2 is electrically connected to a substrate 3 via gold wires 1 through a chip pad 2a. The semiconductor chip 2 is attached to the substrate 3 with an adhesive layer 5 interposed therebetween. The semiconductor chip 2 is connected to a substrate pad 6 via the gold wires 1, and the substrate pad 6 is connected to ball lands 7 and solder balls 9 through a conductive line 6a. Reference numeral 11 denotes an insulating layer. The semiconductor chip 2, the gold wires 1, and a surface of the substrate 3 are protected by an encapsulation material 13.
FIG. 2 is a view illustrating a process flow of a conventional wire bonding process.
In detail, FIG. 2 is a view for explaining a wire bonding process performed using a conventional wire bonding apparatus. The wire bonding apparatus includes a capillary tool 21 through which a gold wire 23 passes and a clamp 25 that grips the gold wire 23. In operation (1), a bonding process, that is, bonding onto a chip pad 27, is prepared. In operation (2), a ball formed on a front end of the gold wire 23 is bonded to the chip pad 27.
In operation (3), the gold wire 23 having a wire shape is formed. In operation (4), reference numeral 29 denotes bonding of the gold wire 23 and a substrate pad (not shown). In operation (5), a tail of the gold wire 23 is cut. In operation (6), a ball 31 is formed at the front end of the gold wire 23 for a next bonding operation.
As described with reference to FIG. 2, the conventional wire bonding process includes bonding the gold wire 23 to each of a plurality of chip pads 27 or a plurality of substrate pads, and the conventional wire bonding process has low manufacturing yields. Also, the conventional wire bonding process is the most time-consuming process from among packaging processes, and thus largely increases the manufacturing costs of a package. In addition, use of gold in the conventional general wire bonding process also increases the manufacturing costs of semiconductor devices.